CROSS_COMPILE ?= /usr/local/sp_env/v2.2.5/i686/bin/ia64-unknown-linux-
endif
AFLAGS += -D__ASSEMBLY__ -nostdinc $(CPPFLAGS)
-AFLAGS += -mconstant-gp
+AFLAGS += -mconstant-gp -Wa,--fatal-warnings
CPPFLAGS += -I$(BASEDIR)/include -I$(BASEDIR)/include/asm-ia64 \
-I$(BASEDIR)/include/asm-ia64/linux \
-I$(BASEDIR)/include/asm-ia64/linux-xen \
-I$(BASEDIR)/arch/ia64/linux -I$(BASEDIR)/arch/ia64/linux-xen
CFLAGS += -nostdinc -fno-builtin -fno-common -fno-strict-aliasing
-CFLAGS += -mconstant-gp
+CFLAGS += -mconstant-gp -Wa,--fatal-warnings
#CFLAGS += -O3 # -O3 over-inlines making debugging tough!
CFLAGS += -O2 # but no optimization causes compile errors!
#CFLAGS += -iwithprefix include -Wall -DMONITOR_BASE=$(MONITOR_BASE)
phy_rr.ve = 1;
ia64_set_rr((VRN0 << VRN_SHIFT), phy_rr.rrval);
+ ia64_dv_serialize_data();
phy_rr.rrval = vcpu->arch.metaphysical_rr4;
//phy_rr.ps = PAGE_SHIFT;
phy_rr.ve = 1;
ia64_set_rr((VRN4 << VRN_SHIFT), phy_rr.rrval);
+ ia64_dv_serialize_data();
} else {
ia64_set_rr((VRN0 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN0])));
+ ia64_dv_serialize_data();
ia64_set_rr((VRN4 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN4])));
+ ia64_dv_serialize_data();
}
/* rr567 will be postponed to last point when resuming back to guest */
ia64_set_rr((VRN1 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN1])));
+ ia64_dv_serialize_data();
ia64_set_rr((VRN2 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN2])));
+ ia64_dv_serialize_data();
ia64_set_rr((VRN3 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN3])));
+ ia64_dv_serialize_data();
ia64_set_rr((VRN5 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN5])));
+ ia64_dv_serialize_data();
ia64_set_rr((VRN6 << VRN_SHIFT),
vrrtomrr(vcpu, VMX(vcpu, vrr[VRN6])));
+ ia64_dv_serialize_data();
vmx_switch_rr7(vrrtomrr(vcpu,VMX(vcpu, vrr[VRN7])),
(void *)vcpu->domain->shared_info,
(void *)vcpu->arch.privregs,